Articles

• A Small-Size High-Power Single-Pole Four-Throw Switch with a Reconfigurable Matching Inductor

  Gyuha Lee, Wonho Lee, Songcheol Hong

  1-5

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• Ka-Band CMOS Power Amplifier Based on Asymmetric Parallel Power Combiner with Shared Linearizer

  Jisu Kim, Hyunjae Jeon, Geonwoo Lee, Juntaek Oh

  6-11

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• A Phase-Domain Analysis of a Sub-Sampling PLL with a Second-Order Loop Filter

  Daeseob Lim, Dohun Kim, Hyeonsik Ahn, Jusung Kim

  12-17

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• A CMOS Temperature Independent Resistor Using a Bilinear Switched-Capacitor for Temperature Sensor

  Yun Chan Im, Ye Gyun Lee, Yong Sin Kim

  18-22

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• Ku-Band Class-J CMOS Power Amplifier Using Sequential Harmonic Impedance Technique

  Dana Moon, Jisu Kim, Juntaek Oh

  23-28

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• A 40-Gb/s 0.78-pJ/bit PAM-4 Transceiver with Unterminated Signaling for Chiplet Interface in 28-nm CMOS

  Ji-Seok Park, Dong-Yun Jeon, San-Ha Park, Yong-Un Jeong

  29-35

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• A 12V-to-Sub-1V Dual Inductor Middle Hybrid Step-Down Converter with Reduced Inductor Current

  Sungin Kwon, Seungeon Lee, Kunhee Cho

  36-42

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• A 10-GHz-Band Voltage-Controlled Oscillator Using Harmonic Shaping to Achieve a 184.9dB Figure-of-Merit for Ultra-Low-Jitter PLL Applications

  Seo Hee Jung, Sa Rang Lee, Seo Hyeon Kwak, Jae Hyouk Choi

  43-48

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• Design of an RF-Triggered Hardware Trojan with a Layout-Matched Golden Model via HT-First Place-and-Route

  Seong-Jin Chang, Dae-Hyeon Lee, Junghee Lee

  49-55

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• A Fractional-N ADPLL-Based GFSK Modulator with ADC-Assisted TDC and DCO Gain Calibration

  Solmon Shin, Youngsik Kim, Shinwoong Kim

  56-65

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