A 101.6-dB-SNDR Fully Dynamic Zoom ADC Using A Closed-Loop Miller Compensated Floating Inverter Amplifier

  • Yo Han Choi Korea University
  • Chul Woo Kim Korea university
Keywords: Delta-sigma modulator, Dynamic amplifier, Floating inverter amplifier, Frequency compensation, Zoom ADC

Abstract

A floating inverter amplifier (FIA) is an alternative amplifier for switched-capacitor circuits. FIA-based switched-capacitor circuits have both negative feedback and dynamic operation advantages. However, the self-cutoff operation creates time-varying operating points while acting as an amplifier. Therefore, a small-signal analysis cannot anticipate the system's response. This paper presents a circuit-design-oriented intuition to tame the step response of such circuits. Also, the simulation method using RF simulators is explained to verify the gain and noise performance. Finally, a Miller-compensated 2-stage FIA is designed based on described design procedure, then applied to a fully dynamic zoom ADC design. The prototype ADC achieves 101.6 dB signal-to-noise and distortion ratio (SNDR) with an SNDR-based Schreier figure of merit (FoM) of 174.2 dB at 2.56-MHz fs having linearly scalable bandwidth and power consumption as fs varies, as well as easy power duty-cycling.

Author Biographies

Yo Han Choi, Korea University

Yohan Choi (S’18) received a B.S degree in radiologic science from Korea University, Seoul, South Korea, in 2017, where he is currently pursuing an integrated M.S. and Ph.D. degree in the area of integrated circuits and systems. In 2017, he was selected as a scholarship student of the Korea Semiconductor Industry Association. His research interests include high-precision sensor interfaces and oversampling ADC designs.

Chul Woo Kim, Korea university

Chul Woo Kim (S’98–M’02–SM’06) received the B.S. and M.S. degrees in electronics engineering from Korea University, Seoul, Korea, in 1994 and 1996, respectively, and the Ph.D. degree in electrical and computer engineering from the University of Illinois at Urbana–Champaign, Champaign, IL, USA, in 2001. He was an Intern with Design Technology, Intel Corporation, Santa Clara, CA, USA, in 1999. In 2001, he joined the IBM Microelectronics Division, Austin, TX, USA, where he was involved in cell processor design. He was a Visiting Professor with the University of California at Los Angeles, Los Angeles, CA, USA, in 2008, and the University of California at Santa Cruz, Santa Cruz, CA, USA, in 2012. Since 2002, he has been with the School of Electrical Engineering, Korea University, where he is currently a Professor. He has co-authored two books entitled CMOS Digital Integrated Circuits: Analysis and Design—4th Edition (McGraw Hill, 2014) and High-Bandwidth Memory Interface (Springer, 2013). His current research interests include wireline transceiver, memory, power management, and data converters. Dr. Kim was a recipient of the Samsung HumanTech Thesis Contest Bronze Award in 1996, the ISLPED Low-Power Design Contest Award in 2001 and 2014, the DAC Student Design Contest Award in 2002, the SRC Inventor Recognition Awards in 2002, the Young Scientist Award from the Ministry of Science and Technology of Korea in 2003, the Seoktop Award for excellence in teaching in 2006 and 2011, the ASP-DAC Best Design Award in 2008, the Special Feature Award in 2014, and the Korea Semiconductor Design Contest: Ministry of Trade, Industry and Energy Award in 2013. He served as a Guest Editor of the IEEE JOURNAL OF SOLID-STATE CIRCUITS, and was elected as a Distinguished Lecturer of the IEEE Solid State Circuits Society from 2015 to 2016. He is currently on the Editorial Board of the IEEE Transactions on Very Large-Scale Integration Systems and on the Technical Program Committee of the IEEE International Solid-State Circuits Conference.

Homepage : https://pure.korea.ac.kr/en/persons/chulwoo-kim

Published
2023-01-01
How to Cite
Choi, Y. H., & Kim, C. W. (2023). A 101.6-dB-SNDR Fully Dynamic Zoom ADC Using A Closed-Loop Miller Compensated Floating Inverter Amplifier. Journal of Integrated Circuits and Systems, 9(1). https://doi.org/10.23075/jicas.2023.9.1.003
Section
Articles