1-1 MASH based on Pipelined-SAR ADC with a PVT Variation Robust Dynamic Amplifier

Abstract

Noise Shaping-Successive Approximation Register (NS-SAR) Analog-to-Digital Converters (ADCs) offer high SNDR due to low quantization noise and low comparator noise which has NS-capability. However, to achieve high SNDR, the NS-SAR needs a high bit-quantizer rather than high order NTF limited by stability. A high bit-quantizer offers smaller residue at the end of conversion. This problem is again affected by comparator noise same as SAR, although the comparator noise is shaped by given NTF. This work addresses this issue through pipelined MASH structure which allows high SNDR with a low-quantizer and a low oversampling ratio (OSR), maintaining good stability and wide bandwidth (BW). The dynamic amplifier configured in the loop filter enables high speed and low power. Our proposed ADC operates at 100 MS/s, it consumes 1.9 mW from a 1.2 V supply and achieves 86.69 dB-SNDR and 6.25 MHz-BW, when OSR is 8.