Dynamic Multiplexer-Driven Level Shifter with High Common-Mode Transient Immunity and Sub-ns Transfer Delay for GaN Gate Drivers

Abstract

High-speed GaN gate drivers in half-bridge setups generate extreme voltage slew rates at the floating high-side node, compromising traditional level shifter reliability. Pulse-triggered designs face fundamental trade-offs between transfer delay reduction and common-mode transient immunity (CMTI) enhancement. This paper proposes a dynamic MUX-driven level shifter that senses internal latch nodes and high-side switch status to adaptively reconfigure current paths. During signal propagation, it enhances latch drive for accelerated transfer; during high-CMTI noise intervals, it maintains differential current balance to reject disturbances. Fabricated in 180 nm BCD process, the circuit achieves 886 ps delay and 200 V/ns CMTI, outperforming traditional PTAC designs for GaN applications.