FPGA-Based Digital Controller for High-Speed CAN Flexible Data-Rate Communication

Jongwon Oh; Jaeseong Kim; Joungmin Park; Seung Eun Lee

Jongwon Oh Seoul National University of Science and Technology
Jaeseong Kim Seoul National University of Science and Technology
Joungmin Park Seoul National University of Science and Technology
Seung Eun Lee Seoul National University of Science and Technology

Keywords: CAN-FD, In-Vehicle Network, ECU, FPGA

Abstract

This paper presents the design and implementation of an FPGA‑based CAN‑FD digital controller optimized for in‑vehicle communication. The proposed controller is organized into modular components, including a transmitter, receiver, error handler, CRC unit, and bus monitor, to ensure accurate protocol handling and stable bit timing across both arbitration and data phases. A bus‑monitor‑centric synchronization method is introduced to enhance timing precision and improve robustness under high‑speed data‑rate switching. The controller was implemented on the AMD Zynq UltraScale+ MPSoC ZCU104 Evaluation Kit and tested with an external CAN‑FD node with an MCP2562FD transceiver and an MCP2518FD-based CAN‑FD shield. Experimental results demonstrate successful transmission and reception of 64‑byte payloads at 4 Mbps without protocol violations, confirming that the proposed architecture is suitable for practical deployment in automotive and industrial applications.