An Adaptive Gate Driver-Assisted Continuously Scalable-Conversion-Ratio Switched-Capacitor Converter

  • Seokhee Han Korea University
  • Chul Woo Kim Korea university
DOI: https://doi.org/10.23075/jicas.2025.11.2.005
Keywords: Switched-capacitor converter, PMIC, voltage-conversion-ratio

Abstract

This paper presents an adaptive gate driver-assisted continuously scalable-conversion-ratio (CSCR) switched-capacitor (SC) DC-DC converter. Gate-source voltage controller (GSVC) generates dynamic supply voltage to the gate driver adaptively according to the output voltage level of the converter. By adopting an adaptive gate driver to achieve soft charging between capacitor connections, the overall system generates a wide range of output with high power density and power conversion efficiency. The proposed converter generates an output range from 0.7 V to 1.8 V from an input voltage of 2.9 V. The proposed converter achieves a peak PCE of 72%. The proposed converter is implemented in TSMC 180 nm BCD process, with a chip area of 3 mm x4 mm.

Author Biographies

Seokhee Han, Korea University

Seokhee Han (Graduate Student Member, IEEE) received the B.S. in electrical engineering at Korea University, Seoul, South Korea, in 2023, where he is currently pursuing the M.S. degree.

His research interests integrated power management system designs and low-power CMOS analog circuit designs, and DC-DC power converters.

 

Chul Woo Kim, Korea university

Chulwoo Kim (Senior Member, IEEE) received the B.S. and M.S. degrees in electronics engineering from Korea University in 1994 and 1996, respectively, and the Ph.D. degree in electrical and computer engineering from the University of Illinois at Urbana-Champaign in 2001.

In May 2001, he joined IBM Microelectronics Division, Austin, TX, where he was involved in Cell processor design. Since September 2002, he has been with the School of Electrical Engineering, Korea University, where he is currently a Professor. He was a Visiting Professor at the University of California at Los Angeles in 2008 and at the University of California at Santa Cruz in 2012. He is a co-author of two books, namely, CMOS Digital Integrated Circuits: Analysis and Design (McGraw Hill, 4th edition 2014) and High-Bandwidth Memory Interface (Springer, 2013). His current research interests are in the areas of wireline transceiver, power management, data converters, and quantum-inspired computing.

Dr. Kim received the Samsung HumanTech Thesis Contest Bronze Award (1996), the ISLPED Low-Power Design Contest Award (2001, 2014), the DAC Student Design Contest Award (2002), SRC Inventor Recognition Awards (2002), the Young Scientist Award from the Ministry of Science and Technology of Korea (2003), the Seoktop Award for excellence in teaching (2006, 2011, 2018, 2023) and ASP-DAC Best Design Award (2008) and Special Feature Award (2014), Korea Semiconductor Design Contest: Prime Minister’s Award (2016). He served on the Technical Program Committee of the IEEE International Solid-State Circuits Conference and as a Guest Editor for the IEEE Journal of Solid-State Circuits. He also served as the Chair of the SSCS Seoul Chapter and as the Distinguished Lecturer of the IEEE Solid-State Circuits Society for 2015-2016. He is currently on the editorial boards of the IEEE Journal of Solid-State Circuits and Transactions on VLSI Systems and an elected AdCom member of the IEEE Solid-State Circuits Society.

Homepage : https://kilby2.korea.ac.kr/

Published
2025-04-01
How to Cite
Han, S., & Kim, C. W. (2025). An Adaptive Gate Driver-Assisted Continuously Scalable-Conversion-Ratio Switched-Capacitor Converter. Journal of Integrated Circuits and Systems, 11(2), 23-27. https://doi.org/10.23075/jicas.2025.11.2.005
Issue
Vol 11 No 2 (2025)
Section
Articles