Ultra Low EMI and THD+N Multi-Level Class-D Audio Amplifier

Ji Hun Lee; Gyu Hyeong  Cho

doi:10.23075/jicas.2022.8.2.008

Ji Hun Lee Korea Advanced Institute of Science and Technology
Gyu Hyeong Cho Korea Advanced Institute of Science and Technology

DOI: https://doi.org/10.23075/jicas.2022.8.2.008

Keywords: Audio amplifier, Class-D, EMI, Multi-level

Abstract

This paper is about a multi-level PWM Class-D audio amplifier. The recent trend of audio amplifier is increasing output power for louder sound and channels for better sounds effects. However, more EMI problems and lower efficiency are caused by the trend. Instead of simple two-level buck power topology, multi-level topology was proposed to solve both EMI and low efficiency problems. Though, linearity of the amplifier is decreased if it adopts multi-level topology rather than two-level topology. Level shifted-PWM is utilized in the prior Maxim integrated structure to overcome the low linearity problem. In this paper, very effective and simple Folded-PWM architecture is proposed, and the new modulation scheme shows better linearity, THD+N, performances than LSPWM. The FPWM is expected to be used in actual industry, since it has super performances.

Author Biographies

Ji Hun Lee, Korea Advanced Institute of Science and Technology

Ji Hun Lee received the B.S., M.S., and Ph.D. degrees in electrical engineering from Korea Advanced Institute of Science and Technology (KAIST), Daejeon, South Korea, in 2014, 2016, and 2021, respectively. Since 2021, he has been with System LSI Business, Samsung Electronics Company Ltd., Hwaseong, South Korea, where he is currently involved in the design of audio amplifier chips. His research interests are in the field of circuits and systems for power converters and audio power amplifiers.

Gyu Hyeong Cho, Korea Advanced Institute of Science and Technology

Gyu Hyeong Cho received the B.S. degree from Hanyang University, Seoul, South Korea, and the M.S. and Ph.D. degrees from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, South Korea, in 1975, 1977, and 1981, respectively, all in electrical engineering.

During 1982–1983, he was with the Westinghouse R&D Center, Pittsburgh, PA, USA. In 1984, he joined the Department of Electrical Engineering, KAIST, where he has been a Full Professor since 1991. He has authored one book on advanced electronic circuits and authored or coauthored more than 200 technical papers and 80 patents. His early research was in the area of power electronics until the late 1990s and worked on soft switching converters and high-power converters. Later, he shifted to analog integrated circuit design, and currently his research interests include several areas including power management ICs, class-D amplifiers, touch sensors and drivers for AMOLED and LCD flat panel displays, biosensors, and wireless power transfer systems.

Dr. Cho received the Outstanding Teaching Award from KAIST. He served as a member of the ISSCC International Technical Program Committee, and is currently an Associate Editor for the IEEE JOURNAL OF SOLID-STATE CIRCUITS. At the ISSCC 60th Anniversary in 2013, he was awarded the ISSCC Author-Recognition Award as one of the top 16 contributors of the conference during last 60 years in ISSCC.

Profile : https://ee.kaist.ac.kr/en/professor/12281/