A 4 - 8GHz Analog Duty Cycle Corrector with 30-70% Correction Range for High-Speed Serial Interface

Abstract

This paper presents the analog duty cycle corrector (DCC) for high-speed and accurate duty cycle correction. To enable high-speed and accurate duty cycle correction, the proposed design utilizes an integrator to extract error information as a DC voltage, while a set generator is introduced to significantly reduce lock time during initial setup time. The proposed circuit was designed using a 65-nm CMOS process. The proposed circuit supports input duty cycles ranging from 30% to 70% across a clock frequency range of 4 - 8 GHz and corrects them to 50% with an accuracy of ±0.5%. The active area of the design is 0.0053mm², with a power consumption is 4.42 mW at 8 GHz.