A Temperature-Compensated LDO without External Reference for Compact SoC Design in 65nm CMOS

  • Beomsoo Kim Sungkyunkwan University
  • Yuli Han DB Global Chip
  • Chanjung Park Sungkyunkwan University
  • Byungjae Kwag Sungkyunkwan University
  • Minwoo Kim Kyungpook National University
  • Sangbin Tae Sungkyunkwan University
  • Kunhee Cho Sungkyunkwan University
Keywords: CMOS, low-dropout regulator, embedded-voltage-reference

Abstract

This paper presents a low-dropout (LDO) regulator with an embedded voltage reference (EVR), designed for system-on-chip (SoC) architectures requiring highperformance operation. The proposed design integrates the
voltage reference directly into the error amplifier (EA), enabling the generation of a 0.95 V output from a 1.05 V input while maintaining a low temperature coefficient and robust loop stability. The circuit comprises a proportional-to-absolutetemperature (PTAT) current generator, an EVR-based EA, and a power MOSFET. The LDO has been implemented in 65nm CMOS process. The simulation results demonstrate a stable output voltage of 0.95 V with a TC of 218 ppm/°C over a wide temperature range from -60°C to 120°C. A peak current efficiency of 99.99 % is obtained, maintaining stable operation and current driving capability up to 220 mA.

Author Biographies

Beomsoo Kim, Sungkyunkwan University

 

 
Yuli Han, DB Global Chip

 

   
Chanjung Park, Sungkyunkwan University

 

 
Kunhee Cho, Sungkyunkwan University

 

 
Published
2025-10-01
How to Cite
Kim, B., Han, Y., Park, C., Kwag, B., Kim, M., Tae, S., & Cho, K. (2025). A Temperature-Compensated LDO without External Reference for Compact SoC Design in 65nm CMOS. Journal of Integrated Circuits and Systems, 11(4), 70-75. https://doi.org/10.23075/jicas.2025.11.4.012
Section
Articles