A Low Power Mixed Signal Convolutional Neural Network for Deep Learning SoC

Malik Summair Asghar; Syed Asmat Ali Shah; HyungWon Kim

Malik Summair Asghar Chungbuk National University, Cheongju, Korea
Syed Asmat Ali Shah Chungbuk National University, Cheongju, Korea
HyungWon Kim Chungbuk National University, Cheongju, Korea

Keywords: Analog Multiplier, Convolutional Neural Network, Convolutional Operation, Neural Network Accelerator

Abstract

Convolutional Neural Networks (CNNs) are getting fame due to their simpler design and higher performance. However, CNNs suffer from large area and power consumption constraints. The multiply-and-accumulate (MAC) unit, which perform the convolution operation inside a CNN, consumes a significant amount of power consumption. In this study we propose a mixed-signal approach for implementing analog MAC unit that can replace the digital MAC units in CNNs. The Analog MAC unit architecture is constituted from binary weighted current steering digital-to-anlaog (DAC) circuit and capacitors. A digital parallel interfaced is designed to provide input image and filter values to the MAC unit. To realize a complete CNN model a low power analog-to-digital (ADC) is then employed at the output to convert the final value back to digital value. When a 3×3 convolution is performed, the analog MAC unit offers a 10.7% reduction in area and a 59.2% reduction in power consumption compared to its fully digital counterparts.

Author Biographies

Malik Summair Asghar, Chungbuk National University, Cheongju, Korea

Malik Summair Asghar received his B.S. degree in electronics engineering from COMSATS University Islamabad, Abbottabad Campus, Pakistan, in 2009. He received his M.S. degree in electrical engineering with specialization in communication electronics from Linkoping University, Linkoping, Sweden, in 2013. He is currently working as Ph.D. student in MSIS lab at Chungbuk National University, Cheongju, South Korea. His research interests are in the areas of analog and mixed-signal circuits IC Design for AI applications, Analog front ends for touchscreen panels and design of injection locked frequency dividers.

Syed Asmat Ali Shah, Chungbuk National University, Cheongju, Korea

Syed Asmat Ali Shah received his B.S. in Computer Engineering from COMSATS Institute of Information Technology (CIIT), Abbottabad, Pakistan, in 2007, M.S. in System-on-Chip from Linkoping University, Sweden, in 2012, and PhD in Electronics Engineering department from Chungbuk National University, in 2020. He served as an assistant professor at COMSATS University Islamabad, Abbottabad Campus until 2016. He is currently a post-doctoral candidate at Electronics Engineering Department, Chungbuk National University, South Korea. His current research interests include ultra-low-power circuits, power management circuits, analog, and mixed-signal Convolutional Neural networks, and SoC design.

HyungWon Kim, Chungbuk National University, Cheongju, Korea

HyungWon Kim received the B.S. and M.S. degrees in electrical engineering from the Korea Advanced Institute of Science and Technology in 1991 and 1993, respectively, and the Ph.D. degree in electrical engineering and computer science from the University of Michigan, Ann Arbor, MI, USA, in 1999. In 1999, he joined Synopsys Inc., Mountain View, CA, USA, where he developed electronic design automation software. In 2001, he joined Broadcom Inc., San Jose, CA, USA, where he developed various network chips, including a WiFi gateway router chip, a network processor for 3G, and 10 gigabit ethernet chips. In 2005, he founded Xronet, Inc., a Korea-based wireless chip maker, where he managed the company as CEO to successfully develop and commercialize wireless baseband and RF chips and software, including WiMAX chips supporting IEEE802.16e and WiFi chips supporting IEEE802.11a/b/g/n. Since 2013, he has been with Chungbuk National University, Cheongju, South Korea, where he is currently an Associate Professor with the Department of Electronics Engineering. His current research focuses cover optimization, object recognition for autonomous driving, V2X network and security, sensor read-out circuits, touch screen controller SoC, and wireless sensor networks.