Design Considerations of Linear Algebra Processor for Wearable Brain-Computer Interface System

Woo Seok Byun; Do Kyun Kim; Sung Yeon Kim; Ji Hoon Kim

doi:10.23075/jicas.2021.7.3.003

Woo Seok Byun Korea Advanced Institute of Science and Technology
Do Kyun Kim Hanwha Systems
Sung Yeon Kim Synopsys Korea
Ji Hoon Kim Ewha Womans University

DOI: https://doi.org/10.23075/jicas.2021.7.3.003

Keywords: Brain-Computer Interface(BCI), Linear Algebra Processor, System-on-a-chip, Target indentification

Abstract

In this paper, we introduced design considerations of a wearable brain-computer interface (BCI) that performs target identification algorithm based on linear algebra. Steady-state visual evoked potential (SSVEP) based wearable BCI have been studied to enable paralyzed patients to communicate with others. However, performance indicators such as the target identification accuracy and the information transfer rate (ITR) still need to be further improved for wearable devices. This paper discusses several considerations for designing algorithms and linear algebra accelerating hardware. In the case of target identification algorithms, a signal binarization technique and candidate reduction technique which are proposed in the precious works can be considered in single-channel SSVEP-based software implementations and multi-channel SSVEP processing in hardware to reduce computational complexity, respectively. For hardware architecture design, we introduced architectural considerations of processing element array that can effectively perform various linear algebra operations.

Author Biographies

Woo Seok Byun, Korea Advanced Institute of Science and Technology

Woo Seok Byun received the B.S. degree in electronics engineering and the M.S. and Ph.D. degree in electronics, radio, and information communications engineering, from Chungnam National University, Daejeon, South Korea, in 2013, 2015, and 2020, respectively. In 2020, he joined the Information and Electronics Research Institute, Korea Advanced Institute of Science and Technology (KAIST), Daejeon, South Korea, where he is currently a Postdoctoral Researcher. His current research interests include CPU/DSP, brain-computer interface, and energy-efficient neural processing engine. He was the recipient of the Distinguished Design Award from the IEEE A-SSCC 2019 Student Design Contest, in 2019.

Do Kyun Kim, Hanwha Systems

Do Kyun Kim received the B.S. and M.S. degrees in electronics engineering from Chungnam National University, Daejeon, South Korea and Seoul Tech, Seoul, South Korea, in 2017 and 2019, respectively. In 2019, he joined the Avionics R&D Center, Hanwha Systems, where he is currently an Engineer. His current research interests include avionics software such as Operational Flight Program (OFP), communication system in aircraft, test automation tools for SW reliability testing, and brain-computer interface for military application.

Sung Yeon Kim, Synopsys Korea

Sung Yeon Kim received the B.S. and M.S. degree in electronic engineering from SeoulTech, Seoul, South Korea, in 2018, and 2020, respectively. In 2020, he joined the Synopsys Korea, Seongnam-si, South Korea, where he is currently working as an Application Engineer. He is currently supporting fusion-compiler front-end projects.

Ji Hoon Kim, Ewha Womans University

Ji Hoon Kim received the B.S. (summa cum laude) and Ph.D. degrees in electrical engineering and computer science from KAIST, Daejeon, South Korea, in 2004 and 2009, respectively. In 2009, he joined Samsung Electronics. In 2018, he joined the Faculty of the Department of Electronic and Electrical Engineering, Ewha Womans University, Seoul, South Korea, where he is currently a Professor. His current research interests include CPU/DSP, communication modem, and low-power SoC design for security/biomedical systems. Dr. Kim is a Technical Committee Member of the circuits and systems for communications and VLSI systems and applications in the IEEE Circuits and Systems Society. He was the recipient of the Best Design Award from the Dongbu HiTek IP Design Contest, in 2007, and the First Place Award from the International SoC Design Conference Chip Design Contest, in 2008.

Homepage : https://dsa.ewha.ac.kr/professor/