Latch Voltage Modulation of Cryptographic Transistor for True Random Number Generator

Abstract

We propose a latch voltage modulation of a single MOSFET functioning as a single-transistor oscillator with an analog-to-digital converter (ADC) for a true random number generator (TRNG). The MOSFET generates irregularly oscillating analog signals due to a single transistor latch with latch-up voltage (V_LU) and latch-down voltage (V_LD), which are then converted into digitized random numbers by the ADC. To achieve a controllable TRNG, it is crucial to examine how process parameters, such as the doping concentration of the p-well (N_pwell), the depth of the p-well (T_pwell), and the junction depth of the source/drain (x_j), influence V_LU and V_LD in a single-transistor oscillator implemented on a bulk-silicon wafer (1T-O_bulk). The randomly fluctuating output voltage (V_out), associated with V_LU and V_LD, serves as an entropy source for the TRNG. The random oscillation of V_out, generated at the drain of the 1T-O_bulk, was observed in a fabricated device using the TSMC 180 nm foundry process. Since aligning V_out from a 1T-O_bulk with the input voltage range of an analog-to-digital converter (ADC) is crucial, the three aforementioned major process parameters are tuned to control V_out. This approach contributes to advancing next-generation security technology.