Input-Signal-Based Power-Gated Single-Slope ADC for Low-Power CMOS Image Sensors

  • Hohyeon Lee Dongguk University
  • Kyungmin Lee Dongguk University
  • Soo Youn Kim Dongguk University
Keywords: Image sensor, Low-power comparator, Pixel-signal-based prediction, Positive-feedback bias sampling

Abstract

This paper presents a low-power single-slope analog-to-digital converter (SS-ADC) that uses two comparators of the same structure to predict when a comparator flips. One of the comparators, a replica comparator, uses only half the bias current compared to the main comparator, causing the output of the comparator to flip early. By predicting the flipping time of the comparator in advance, power-gating techniques can be applied, resulting in reduced dynamic power consumption. The proposed 11-bit SS-ADC is fabricated using a 28-nm standard process, considering a resolution of 320 × 240 and an operating frame rate of 133 frames per second. Measurement results demonstrate that the power consumption of the proposed SS-ADC has decreased by approximately 17.6%. The total power consumption per column is 4.8 μW, and the figure of merit is 76.4 fJ/conversion step.

Author Biographies

Hohyeon Lee, Dongguk University

Hohyeon Lee received the B.S. and M.S. degrees in System Semiconductor from Dongguk University, Seoul, Korea, in 2022 and 2024, respectively.

His research interest includes low-power CMOS image sensor and analog to digital converter. He is currently conducting research on high-speed CMOS image sensors.

Kyungmin Lee, Dongguk University

Kyungmin Lee received the B.S.  degree in System Semiconductor from Dongguk University, Seoul, Korea, in 2024

His research interest includes low-power CMOS image sensor and analog to digital converter. He is currently conducting research on high-speed CMOS image sensors.

Soo Youn Kim, Dongguk University

Soo Youn Kim received B.S. and M.S. degrees in semiconductor science from Dongguk University, Seoul, South Korea, in 2001 and 2003, respectively, and the Ph.D. degree in Electrical and Computer Engineering from the School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA, in 2013. From 2003 to 2008, she was an engineer with the Image Development Team of System LSI division, Samsung Electronics, Yongin, South Korea. From 2013 to 2017, she was a staff engineer with Qualcomm Corporate Research and Development, San Diego, CA. USA. She is currently an assistant professor of the semiconductor science, at Dongguk University, Seoul South Korea. Her current research interests cover circuit design of CMOS image sensor, computer vision sensor, processing-in-memory, and spike-neural networks.

Homepage : https://sites.google.com/view/sidl

Published
2025-04-01
How to Cite
Lee, H., Lee, K., & Kim, S. Y. (2025). Input-Signal-Based Power-Gated Single-Slope ADC for Low-Power CMOS Image Sensors . Journal of Integrated Circuits and Systems, 11(2), 11-16. https://doi.org/10.23075/jicas.2025.11.2.003
Section
Articles