A 2.5 GHz, 87-fs Step, Temperature-and-Voltage-Tolerant 6-bit Digital-to-Time Converter in 28nm CMOS

  • Doona Song Konkuk University
  • Gyuchan Cho Konkuk University
  • Jintae Kim Konkuk University
Keywords: Digital-to-time converter, DTC, capacitor-DAC, CDAC, replica feedback loop

Abstract

This paper presents a temperature-and-voltage-tolerant 2.5GHz 6-bit digital-to-time converter (DTC) with an 87-fs resolution. The capacitor-DAC (CDAC) based DTC can achieve high resolution and linearity, but typical DTC structures suffer from performance degradation due to temperature and voltage variations. To address this issue, we implement a replica feedback loop consisting of a regulated constant-slope DTC, which effectively maintains the delay of the DTC even as temperature and voltage conditions fluctuate. Additionally, an on-chip histogram counter accurately measures on-chip delays. The proposed DTC in this paper is fabricated in a 28-nm CMOS process, with the core occupying an area of 0.0129 mm2. It operates at 2.5 GHz with a 0.9 V supply voltage, consuming only 0.82 mW. Measured results demonstrate that the full-scale range changes for 125 °C temperature variation and for 200mV supply variation are reduced by 7.2x and 1.9x, respectively.

Author Biographies

Doona Song, Konkuk University

Doona Song received the B.S. degree in Electrical and Electronics Engineering from Konkuk University, Seoul, Korea, in 2023 and is currently working toward the M.S. degree at Konkuk University, Seoul, Korea.  Her research interest includes high-speed ADC.

Gyuchan Cho, Konkuk University

Gyuchan Cho received the B.S. and M.S. degrees in Electrical and Electronics Engineering from Konkuk University, Seoul, Korea, in 2022 and 2024, respectively.  His research interest includes high resolution Digital-to-Time Converters.

Jintae Kim, Konkuk University

Jintae Kim received the B.S. degree in electrical engineering from Seoul National University, Seoul, Korea, in 1997, and the M.S. and Ph.D. degrees in electrical engineering from University of California, Los Angeles, CA, in 2004 and 2008, respectively.

He is an associate professor of Electronics Engineeing department at Konkuk Univeristy, Seoul, Korea. His current research focus is on high-performance and low-power mixed-signal integrated circuit (IC) designs in advanced CMOS technologies and computer-aided design methodologies for analog and mixed-signal ICs. He has held various industry positions at Xeline, Seoul, Korea, Barcelona Design, Sunnyvale, CA, Keysight Technologies, Santa Clara, CA (Formerly part of Agilent Technology), SiTime Corporation, Sunnyvale, CA, and Invensense Technology, San Jose, CA, where he was involved in the design of numerous communication and sensor IC products. Dr. Kim is a recipient of the IEEE Solid-State Circuits Predoctoral Achievement Award in 2007-2008.

Homepage : http://msel.konkuk.ac.kr/

Published
2025-01-01
How to Cite
Song, D., Cho, G., & Kim, J. (2025). A 2.5 GHz, 87-fs Step, Temperature-and-Voltage-Tolerant 6-bit Digital-to-Time Converter in 28nm CMOS. Journal of Integrated Circuits and Systems, 11(1). https://doi.org/10.23075/jicas.2025.11.1.003
Section
Articles