Application of Current Mode Signal Processing: ADC

So Youn Park; Hyung Min Kim; Daniel-Ju Hun Lee; Seong Kweon Kim

doi:10.23075/jicas.2020.6.3.004

So Youn Park Seoul National University of Science and Technology
Hyung Min Kim Seoul National University of Science and Technology
Daniel-Ju Hun Lee Seoul National University of Science and Technology
Seong Kweon Kim Seoul National University of Science and Technology

DOI: https://doi.org/10.23075/jicas.2020.6.3.004

Keywords: ADC, Cascade structure, Current-mode, Low power consumption, Voltage swing

Abstract

In this paper, a low power current mode 12-bit ADC (Analog to Digital Converter) is proposed to mix digital circuits and analog circuits with the advantages of low power consumption and high speed operation. The proposed 12 bit ADC is implemented by using 4-bit ADC in a cascade structure, so its power consumption can be reduced, and the chip area can be reduced by using a conversion current transfer circuit. Error of the reference current, which is caused by the current mismatch in the reference current transfer and the conversion current transfer is about 4.19uA. The proposed 12-bit ADC is implemented with SK Hynix 350nm 5metal 1poly process, and post-layout simulation is performed using Cadence MMSIM. It operates at a supply voltage of 3.3V and the area of the proposed circuit is 318um X 514um. In addition, the ADC shows the possibility of operating with low power consumption of 3.4mW average power consumption in this paper.

Author Biographies

So Youn Park, Seoul National University of Science and Technology

So Youn Park received the B.S. degree in electronics and IT media engineering from Seoul National University of Science and Technology, Seoul, Korea, in 2020 and is currently working towards a M.S. degree in media IT engineering from Seoul National University of Science and Technology. Her research interest includes analog AI processor circuit design.

Hyung Min Kim, Seoul National University of Science and Technology

Hyung Min Kim received the B.S. degree in electronics and IT media engineering from Seoul National University of Science and Technology, Seoul, Korea, in 2019 and is currently working towards a M.S. degree in Nano IT Design Fusion from Seoul National University of Science and Technology His research interest includes analog AI processor circuit design.

Daniel-Ju Hun Lee, Seoul National University of Science and Technology

Daniel-Ju Hun Lee received the B.S. degree in electrical engineering from California State University, Fullerton, in 2018 and is currently working towards a M.S. degree in Integrated IT engineering from Seoul National University of Science and Technology, Seoul, Korea. His main interests are analog AI processor circuit design.

Seong Kweon Kim, Seoul National University of Science and Technology

Seong Kweon Kim received the B.S. degree in Inha University, in 1996 and a Ph.D. degree in electronics engineering from Tohoku University, Japan, in 2002. He was an assistant professor and research fellow in Tohoku University, Japan from 2002 to 2004. He was also an associate professor at Mokpo National Maritime University from 2004 to 2009 and is currently a professor in Seoul National University of Science and Technology, Seoul, Korea. His main interests are analog circuits and systems.

Homepage : https://itsc.seoultech.ac.kr/index.do