Design of 1:1 Transformer based 2-Stage Differential Low-noise Amplifier for W-band Radar

Jaeeun Lee; Choul-Young Kim

doi:10.23075/jicas.2024.10.2.001

Jaeeun Lee Chungnam National University
Choul-Young Kim Chungnam National University

DOI: https://doi.org/10.23075/jicas.2024.10.2.001

Keywords: 5G, CMOS, Low Noise Amplifier, Neutralization Capacitor

Abstract

This paper introduces a 77-81 GHz CMOS low-noise amplifier (LNA) designed for FMCW radar applications, with the goal of achieving high gain and low noise figure. To attain these objectives, a two-stage differential common-source (CS) structure is adopted, and neutralization capacitors are employed in each stage to obtain high gain. The proposed LNA is implemented in bulk CMOS 65 nm process, providing a gain of over 17 dB and a noise figure of less than 4.5 dB in the frequency range of 77-81 GHz. The chip size, including pads, is 0.69 μm 0.39 μm.

Author Biographies

Jaeeun Lee, Chungnam National University

Jae Eun Lee received the B.S. degrees from Chungnam National University (CNU), Daejeon, Republic of Korea, in 2016, and currently working toward a Ph.D. in Microelectronics Engineering from CNU. His research interests include RF/mm-wave integrated circuit design for wireless communications

Choul-Young Kim, Chungnam National University

Choul Young Kim received his MS and Ph.D. from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Republic of Korea, in 2004 and 2008, respectively. From March 2009 to February 2011, he was a postdoctoral research fellow at the Department of Electrical and Computer Engineering, University of California, San Diego, USA. Currently, he is a Professor of Electronics Engineering at Chungnam National University. His research interests include RF/mm-wave integrated circuits and systems for short-range radar and phased-array antenna applications, and analog front-end readout integrated circuits for LADAR applications.

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