A Design of a Communication Processor for Implementing Local Network in Zonal Architecture

Kwonneung Cho; Kwanghyun Go; Seongmo An; Seung Eun Lee

doi:10.23075/jicas.2023.9.4.005

Kwonneung Cho Seoul National University of Science and Technology
Kwanghyun Go Seoul National University of Science and Technology
Seongmo An Seoul National University of Science and Technology
Seung Eun Lee Seoul National University of Science and Technology (Seoultech)

DOI: https://doi.org/10.23075/jicas.2023.9.4.005

Keywords: Zonal architecture, local network, LIN controller, bus functional model

Abstract

As the complexity of in-vehicle network is increased, zonal architecture is proposed for the next generation network architecture. The zonal architecture divides the in-vehicle network into local networks and interconnects the local networks in a central gateway. This paper proposes a local network processor based on local interconnect network (LIN). The processor includes a light-weight core and dedicated LIN controller to achieve design goals such as design area and performance. The processor is fabricated with TSMC 180nm CMOS process and the characteristics are compared to Samsung 28nm process.

Author Biographies

Kwonneung Cho, Seoul National University of Science and Technology

Kwonneung Cho received the B.S. degree in the Department of Electronic Engineering at the Seoul National University of Science and Technology, Seoul, Korea, in 2021. He is a M.S. student in the Department of Electronic Engineering at the Seoul National University of Science and Technology, Seoul, Korea. His research interests include computer programming, digital system design and SoC for Embedded processor.

Kwanghyun Go, Seoul National University of Science and Technology

Kwanghyun Go received the B.S. degree in the Department of Electronic Engineering at the Seoul National University of Science and Technology, Seoul, Korea in 2022, where he is pursuing the M.S. degree. His current research interests include digital system design, In-Vehicle network, AI accelerator and System-on-Chip.

Seongmo An, Seoul National University of Science and Technology

Seongmo An is a undergraduate student in the Department of Electronic Engineering at the Seoul National University of Science and Technology, Seoul, Korea. His current research interests include digital system design, processor for System-on-Chip and AI accelerator.

Seung Eun Lee, Seoul National University of Science and Technology (Seoultech)

Seung Eun Lee received the Ph.D. degree in electrical and computer engineering from the University of California, Irvine (UC Irvine) in 2008 and the B.S. and M.S. degrees in electrical engineering from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon in 1998 and 2000, respectively. After graduating, he had been with Intel Labs., Hillsboro, OR, where he worked as Platform Architect. In 2010, he joined the faculty of the Seoul National University of Science and Technology, Seoul. His current research interests include computer architecture, multi-processor system-on-chip, low-power and resilient VLSI, and hardware acceleration for emerging applications.

Homepage : https://soc.seoultech.ac.kr/