A 5-5.8 GHz Sub-2 dB NF CMOS Low Noise Amplifier with Bandwidth Extension and Noise Optimization Techniques

  • Dong Myeong Kim Jeonbuk National University
  • Dong Gu Im Jeonbuk National University
Keywords: Cascode, Double-Stacked resonator, Feedback, LNA, Minimum niose figure, Noise optimizationm, Optimum source, Impedance, Source pull, Sub-2 dB NF, Wideband, Wifi

Abstract

A 5-5.8 GHz sub-2 dB noise figure (NF) CMOS low noise amplifier (LNA) with bandwidth extension and noise optimization techniques is proposed for WiFi applications. The proposed LNA was based on the cascode feedback topology for broadband input impedance matching characteristic, and adopted the double-stacked LC resonators as an output load in order to extend the gain-bandwidth from 5 to 5.8 GHz. In addition, the input matching network was designed to provide the optimum source impedance for the minimum noise figure (NFmin) over wide frequency range (5-5.8 GHz) using the source-pull simulation. Owing to the proposed noise optimization technique, the NF of the LNA can be close to NFmin over wide operating frequency range. The proposed LNA was designed using a 65-nm CMOS process. It showed a NF of less than 2 dB, a power gain (S21) of greater than 15 dB, and an input and output return loss (S11 and S22) of less than -10 dB over 5-5.8 GHz in the post-layout simulation. The simulated 2 dB gain bandwidth and input-referred third-order intercept point (IIP3) were 1399 MHz and -4.1 dBm, respectively, with dc power consumption of 7.4 mW.

Author Biographies

Dong Myeong Kim, Jeonbuk National University

Dong Myeong Kim received the B.S. degree in division of electronic engineering from the Jeonbuk National University (JBNU), Jeonju, Korea, in 2019. He is currently working toward the M.S. degree in division of electronic engineering at JBNU. His research during M.S. course has focused on low power IoT CMOS front-end circuit design such as extremely low noise amplifier (LNA) and high efficiency power amplifier.

Dong Gu Im, Jeonbuk National University

Dong Gu Im (S09-M13) received the B.S., M.S., and Ph.D. degrees in electrical engineering and computer science from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Korea, in 2004, 2006, and 2012, respectively.

From 2006 to 2009, he was an Associate Research Engineer with LG Electronics, Seoul, Korea, where he was involved in the development of universal analog and digital TV receiver ICs. From 2012 to 2013, he was a Post-Doctoral Researcher with KAIST, where he was involved in the development of the first RF SOI CMOS technology in Korea with SOI business team in National NanoFab Center (NNFC), Daejeon, Korea, and was responsible for the design of antenna switch, digitally tunable capacitor, power MOSFETs, and ESD devices. In 2013, he joined the Texas Analog Center of Excellence (TxACE), Department of Electrical Engineering, University of Texas at Dallas, as a Research Associate, where he developed ultra-low-power CMOS radios with adaptive impedance tuning circuits. In 2014, he joined the Division of Electronics Engineering, Chonbuk National University, Jeollabuk-do, Korea, and is now an Associate Professor. His research interests are CMOS analog/RF/mm-wave ICs and system design for wireless communications.

Published
2020-04-01
How to Cite
Kim, D. M., & Im, D. G. (2020). A 5-5.8 GHz Sub-2 dB NF CMOS Low Noise Amplifier with Bandwidth Extension and Noise Optimization Techniques. Journal of Integrated Circuits and Systems, 6(2). https://doi.org/10.23075/jicas.2020.6.2.001
Section
Articles