Designing Neuromorphic Processor with On-Chip Learning

Jeong Woo Park; Dong Suk Jeon

doi:10.23075/jicas.2020.6.2.004

Jeong Woo Park Seoul National University
Dong Suk Jeon Seoul National University

DOI: https://doi.org/10.23075/jicas.2020.6.2.004

Keywords: Edge computing, Image classification, Learning systems, Neuromorphic computing, Multi-layer perceptron

Abstract

In this paper, we present a neuromorphic processor that could learn to classify images through spiking information between neurons. Data is only computed locally, and there is no need for energy-hungry data transmissions that is required for any other machine learning algorithms. Careful algorithmic adaptations, along with novel hardware implementation of softmax functions are introduced to deliver maximum performance on image classification tasks while minimizing energy consumption. The design was fabricated in TSMC 65nm technology and consumes mere 23.6mW at a scaled voltage of 0.8V with 20MHz clock frequency, while showing a throughput of 73.9M pixels/second for supervised training on handwritten images.

Author Biographies

Jeong Woo Park, Seoul National University

Jeongwoo Park received the B.S. degree from the department of electrical and computer engineering, Seoul National University, Seoul, South Korea, in 2017, where he is currently pursuing the Ph.D. degree. His research interests include neuromorphic algorithms and systems, quantized neural network training, and efficient ASIC design for deep learning inference/training.

Dong Suk Jeon, Seoul National University

Dong Suk Jeon received the B.S. degree in electrical engineering from Seoul National University, Korea, in 2009, and Ph.D degree from University of Michigan, Ann Arbor, MI, in 2014. He is currently an assistant professor in Seoul National University, Korea. His main interests include digital signal processing, low power integrated circuits, and System-on-Chip (SoC) architecture.

Homepage : https://mms.snu.ac.kr/