Lee, Jun-Cheol, and Joo-Hyung Chae. “Design of 2.5-Gb/s Parallel PRBS Generator and 4-Gb/S Area Efficient PRBS Checker in 65-Nm CMOS Process”. Journal of Integrated Circuits and Systems 10, no. 1 (January 1, 2024): 34-39. Accessed June 27, 2026. http://jicas.idec.or.kr/index.php/JICAS/article/view/226.